FEMU: An Open-Source RISC-V Emulation Platform for the Exploration of Accelerator-based Edge Applications
Machetti, Simone; Peón Quirós, Miguel; Kasap, Deniz; Sapriza, Juan; Rodríguez, Rubén; Miranda, José; Schiavone, Pasquale Davide; Atienza, David
2024

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Abstract

In this work, we present FEMU, an open-source RISC-V emulation platform to support the exploration of accelerator-based edge applications.

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Title FEMU: An Open-Source RISC-V Emulation Platform for the Exploration of Accelerator-based Edge Applications
Author(s) Machetti, Simone ; Peón Quirós, Miguel ; Kasap, Deniz ; Sapriza, Juan ; Rodríguez, Rubén ; Miranda, José ; Schiavone, Pasquale Davide ; Atienza, David
Conference Design, Automation and Test in Europe Conference (DATE), Valencia, Spain, 2024
Date 2024-03-27
Laboratories ESL
Record Appears in Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > ESL - Embedded Systems Laboratory
Work produced at EPFL
Published
Posters
Record creation date 2024-03-29

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